16Mb Asynch. RH-SRAM
C05HA512K32 - 16Mb Asynchronous RH-SRAM
The C05HA512K32 is a high performance 16Mb CMOS RH-SRAM organized as 524,288 words by 32 bits. It is pin selectable: master or slave. The master device is a full function device with user defined autonomous EDAC and scrub options. The slave device employs a scrub on demand feature that can be initiated by a master device. Three read cycles and four write cycles are available depending on the user needs. The C05HA512K32 is manufactured by Texas Instruments using HardSIL™ technology from SST.
Features
C05HA512K32 - 16Mb Asynchronous RH-SRAM
The C05HA512K32 is a high performance 16Mb CMOS RH-SRAM organized as 524,288 words by 32 bits. It is pin selectable: master or slave. The master device is a full function device with user defined autonomous EDAC and scrub options. The slave device employs a scrub on demand feature that can be initiated by a master device. Three read cycles and four write cycles are available depending on the user needs. The C05HA512K32 is manufactured by Texas Instruments using HardSIL™ technology from SST.
Features
- Access time: <20ns read, <10ns write
- Functionally compatible with commercial 512Kx32 SRAM devices
- Built-in Error Detection and Correction (EDAC) to mitigate soft errors
- Built-in scrub engine for autonomous correction
- Supports write-through
- CMOS compatible input and output level, three state bidirectional data bus
- 3.3 +/- 0.3V I/O, 1.8 +/- 0.15V CORE
- Packaging options: 76-lead ceramic quad flatpack (CQFP76)
- TID immunity: >300krad (Si)
- SER: <5e-17 upsets/bit-day (core using ECC and Scrub) calculated using CREME96 for geosynchronous orbit, solar minimum
- Latch-up immunity: >LET 110 MeV (T=398K)
-
For 16Mb RH-SRAM product availability updates, click here.